Imaging of the Building Contours with Through the Wall UWB Radar System

Any actual information about a building interior can be very useful before entering a dangerous area. It can be used to plan strategies in many rescue and security applications. The paper deals with imaging of the inner and outer building contours from the outside using through the wall UWB radar. The whole processing chain for obtaining the contours of a scanned building is explained. The image processing method of highlighting the building walls using Hough transform with assumed knowledge of the direction of walls is presented. The algorithm was tested on real measurement data acquired from a M-sequence UWB radar system

A Robust Chaos-Based True Random Number Generator Embedded in Reconfigurable Switched-Capacitor Hardware

This paper presents a new chaos-based True Random Number Generator (TRNG) with a decreased voltage supply sensitivity. Contrary to the traditionally used sources of randomness it uses a well-defined deterministic switched-capacitor circuit that exhibits chaos. The whole design is embedded into a commercially available mixed-signal Cypress PSoC reconfigurable device without any external components. The proposed design is optimized for a reduction of influence of the supply voltage to the quality of the generated random bit stream. The influence of circuit non-idealities is significantly reduced by the proposed XOR corrector and optimized circuit topology. The ultimate output bit rate of the proposed TRNG is 60 kbit/s and the quality of generated bit-streams is confirmed by passing standard FIPS and correlation statistical tests performed in the full range of PSoC device supply voltages

Testing of PLL-based True Random Number Generator in Changing Working Conditions

Security of cryptographic systems depends significantly on security of secret keys. Unpredictability of the keys is achieved by their generation by True Random Number Generators (TRNGs). In the paper we analyze behavior of the Phase-Locked Loop (PLL) based TRNG in changing working environment. The frequency of signals synthesized by PLL may be naturally influenced by chip temperature. We show what impact the temperature has on the quality of generated random sequence of the PLL-based TRNG. Thank to analysis of internal signals of the generator we are able to prove dependencies between the PLL parameters, statistical parameters of the generated sequence and temperature. Considering the measured results of experiments we form a new requirement in order to improve the robustness of the designed TRNG

Estimating Level of Engagement from Ocular Landmarks

E-learning offers many advantages like being economical, flexible and customizable, but also has challenging aspects such as lack of – social-interaction, which results in contemplation and sense of remoteness. To overcome these and sustain learners’ motivation, various stimuli can be incorporated. Nevertheless, such adjustments initially require an assessment of engagement level. In this respect, we propose estimating engagement level from facial landmarks exploiting the facts that (i) perceptual decoupling is promoted by blinking during mentally demanding tasks; (ii) eye strain increases blinking rate, which also scales with task disengagement; (iii) eye aspect ratio is in close connection with attentional state and (iv) users’ head position is correlated with their level of involvement. Building empirical models of these actions, we devise a probabilistic estimation framework. Our results indicate that high and low levels of engagement are identified with considerable accuracy, whereas medium levels are inherently more challenging, which is also confirmed by inter-rater agreement of expert coders

Polyphase Order Analysis Based on Convolutional Approach

The condition of rotating machines can be determined by measuring of periodic frequency components in the vibration signal which are directly related to the (typically changing) rotational speed. Classical spectrum analysis with a constant sampling frequency is not an appropriate analysis method because of spectral smearing. Spectral analysis of vibration signal sampled synchronously with the angle of rotation, known as order analysis, suppress spectral smearing even with variable rotational speed. The paper presents optimised algorithm for polyphase order analysis based on non power of two DFT algorithm efficiently implemented by chirp FFT algorithm. Proposed algorithm decreases complexity of digital resampling algorithm, which is the most complex part of complete spectral order algorithm

GSM Channel Equalization Algorithm - Modern DSP Coprocessor Approach

The paper presents basic equations of efficient GSM Viterbi equalizer algorithm based on approximation of GMSK modulation by linear superposition of amplitude modulated pulses. This approximation allows to use Ungerboeck form of channel equalizer with significantly reduced arithmetic complexity. Proposed algorithm can be effectively implemented on the Viterbi and Filter coprocessors of new Motorola DSP56305 digital signal processor. Short overview of coprocessor features related to the proposed algorithm is included

Embedded Platform for Automatic Testing and Optimizing of FPGA Based Cryptographic True Random Number Generators

This paper deals with an evaluation platform for cryptographic True Random Number Generators (TRNGs) based on the hardware implementation of statistical tests for FPGAs. It was developed in order to provide an automatic tool that helps to speed up the TRNG design process and can provide new insights on the TRNG behavior as it will be shown on a particular example in the paper. It enables to test sufficient statistical properties of various TRNG designs under various working conditions on the fly. Moreover, the tests are suitable to be embedded into cryptographic hardware products in order to recognize TRNG output of weak quality and thus increase its robustness and reliability. Tests are fully compatible with the FIPS 140 standard and are implemented by the VHDL language as an IP-Core for vendor independent FPGAs. A recent Flash based Actel Fusion FPGA was chosen for preliminary experiments. The Actel version of the tests possesses an interface to the Actel’s CoreMP7 softcore processor that is fully compatible with the industry standard ARM7TDMI. Moreover, identical tests suite was implemented to the Xilinx Virtex 2 and 5 in order to compare the performance of the proposed solution with the performance of already published one based on the same FPGAs. It was achieved 25% and 65% greater clock frequency respectively while consuming almost equal resources of the Xilinx FPGAs. On the top of it, the proposed FIPS 140 architecture is capable of processing one random bit per one clock cycle which results in 311.5 Mbps throughput for Virtex 5 FPGA

The Methods of Design and Implementation of Stack Filters for Image Processing

This paper deals with a large class of nonlinear digital filters, the stack filters, which contain all combinations and compositions of rank order operators within a finite window. Attention is given to design and effective hardware implementation of an optimal stack filter for image processing. Presented simulation results confirm robustness of stack filters in the image restoration corrupted by impulsive noise

A New Glass of Nonlinear Filters: Microstatistic Volterra Filters

In this paper a new subset of the time-invariant microstatistic filters so-called microstatistic Volterra filters are proposed. This class of nonlinear filters is based on the idea of the conventional microstatistic filter generalization by substituting Wiener filters applied in the conventional microstatistic filter structure by Volterra filters. The advantage of the microstatistic Volterra filters in comparison with the Wiener filters, Volterra filters and conventional microstatistic filters is the fact that in the case of non-Gaussian signal processing the microstatistic Volterra filters can outperform Wiener filters, Volterra filters or conventional microstatistic filters. The validity of this basic property of the microstatistic Volterra filters is verified by a number of computer experiments. The disadvantage of the microstatistic Volterra filters is their relatively high computational complexity